http://www.dolphin.fr/medal/smash/smash_download.html

               




General information on SMASH

Unique in CAE industry

SMASH was born true mixed mode simulator. Unlike its competitors, a single program handles both analog and digital signals! SMASH is the only genuine mixed signal, multi-level simulator on the market today.

A mixed signal solution

SMASH promotes a simulation as natural as mixed signal schematics entry, using as input a circuit description, natively mixed signal. In this way, SMASH makes obsolete the need to divide a mixed signal netlist into one logic and one analog simulator.

SMASH simulates any mixture of analog and digital components, using the best algorithms and providing complete interaction between the logic and analog parts. The result is an immediate simulation start. The only necessary tuning is for optimizing the simulation engine, but, once this is done, results are interactively displayed on the screen.

A multi level solution

SMASH is by no way limited to the circuit or structural level . For years, logic system designers have known about the limitations of gate-level simulation, and the benefits of behavioral modeling. With the increasing size and complexity of analog systems, analog designers also face the limitations of classical circuit analysis (SPICE) when simulating a whole IC. Far ahead from the competition, SMASH provides the only real solution for global system simulation: it lets you use both analog and digital behavioral models in ABCD, VHDL-AMS and Verilog. Get the freedom to choose the right level of abstraction for your modeling: ranging from the primitive level to non linear conditional equations, to genuine behavioral descriptions using the full power of the C programming language.

Convergence Analysis

"Using SMASH for our purely analog and mixed signal simulations since 1997 has increased our productivity due to ease of use allowing quick set-up of any simulation.  Compared to other solutions for mixed signal simulation (like cosimulation), SMASH is particularly efficient for finding the operating point, and with its several heuristics, always arrived at with a small number of iterations.  I recommend SMASH to any designer involved in mixed signal design!", stated the design director from Microchip, Switzerland.

SMASH heuristics have been chosen to limit convergence problems, major issue of all simulators, principally those using a cosimulation backplane. Five heuristics are implemented so that if one gives no answers, SMASH automatically switches to the next one.

Compatibility with other EDA tools

SMASH uses SPICE syntax for analog descriptions, Verilog-HDL and VHDL for digital, VHDL-AMS and ABCD (a combination of SPICE and C) for analog behavioral, and C for DSP algorithms.

A State of the art solution

In the forefront of analog and mixed signal simulation, the major evolutions of SMASH 4.3 are on the analog side.  A new technique (patent pending) is introduced in SMASH allowing meticulous verification to estimate the yield limitations of your design due to the local dispersion before production (like offset matching), but also the possibility to diagnose the transistors sensitive to such matching effects.

What is new in the latest release of SMASH?  

SMASH 4.4 is now available. It introduces the implementation of dynamic Electrical Rules Checking.

There is an increasing importance for designers to be able to perform ERC and SOA checks in order to control that circuits variables (current, voltages, powers, threshold and saturation voltages, internal variables, etc.) stay inside a given interval or do not exceed predefined limits (maximum or minimum).

These electrical design rule checks are an important aspect in obtaining design compliance with the specifications and guaranteeing safe operation. The aim is to catch mistakes early in the design process and the rules enforce a consistent design methodology. Above all, dynamic ERC significantly increases productivity in netlist finalization.  Implemented in SMASH, it allows the simulation to be paused or aborted when a rule is violated in order for the designer to be able to analyze and debug the circuit.

More information on dynamic ERC compared to static ERC.   See the press announcement with our german partner of eight years with scores of IC Simulation Stations

SMASH 4.4 also introduces:

• VHDL and VHDL-AMS is now available under Linux
• A revamped user interface with new menu organisation and new toolbar graphisms
• Eye diagram representation

Discover all new features in SMASH 4.4 (pdf file)

How is SMASH packaged?  

• PC/Windows platform as a Windows standalone application, under Windows-95, Windows-98, Windows Me, Windows NT and Windows 2000.
• Sun/Solaris platform, on Sun machines running the Solaris 2.5 operating system.
• i86 Linux platform

 Who uses SMASH?

As SMASH is a mixed signal simulator, most of users are mixed-signal circuit designers. However, SMASH can be used as a purely analog or purely logic simulator.

Three main application fields are identified: ASIC, PCB and Mechatronics designs

SMASH is used by large companies such as ATMEL, ELMOS, FLEXTRONICS, HITACHI, OLYMPUS, RICOH, Y-MEDIA... but also by numerous smaller companies.

SMASH is organized in the following kits:

• SMASH Viewer is a graphic user interface which provides advanced waveform viewing capabilities as well as dialogs to set simulation options and directives,
• SMASH Batch is a batch interface which provides scripting capabilities allowing multiple simulations and/or analyses to be run without any user interaction,
• SMASH Kernel contains the unique implementation of our mixed-signal language mixing technique, providing mixed-signal simulation services needed by all simulation language kits,
• SMASH Spice provides SPICE compatible analog simulation capabilities,
• SMASH ABCD provides C-like analog behavioral modeling capabilities,
• SMASH Relax provides relaxation algorithms for faster simulation of eligible circuits,
• SMASH Verilog provides IEEE compatible Verilog-HDL simulation capabilities,
• SMASH VHDL provides IEEE Std 1076-1993 VHDL simulation capabilities, also compatible with the IEEE Std 1076.4-1995 VITAL extension,
• SMASH VHDL-AMS provides IEEE Std 1076.1-1999 VHDL-AMS (Analog and Mixed-Signal Extensions) simulation capabilities,
• SMASH Trans enables proprietary model development,
• SMASH Shaker handles automatic characterization and provides an efficient solution for comparing simulation results.
• SMASH DIADEM is the simulation model library. It contains thousands of analog components described in SPICE (OpAmp, Comparators, diodes, transistors...) and logic components described in VERILOG-HDL (CMOS 4xxx and 74 families).
• SMASH EMBLEM is the electromechanical library. It contains:
  • Electromechanical models (engines, transformators...)
  • MEMS models (pressure sensors...),
  • Power models with high accuracy (IGBT, DIODES, Power MOS...)
• SMASH Schematic Interface offers netlisting and cross-probing capabilities to SMASH from CADENCE Composer, Cohesion Chip Designer or PADS PowerLogic.
  
  For a free SMASH evaluation, click the link below:

http://www.dolphin.fr/medal/smash/smash_download.html

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